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227-0148-00L 4 Credits DS , BSC , MSC D-ITET , D-INFK , D-PHYS , D-MATH
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VLSI III: Test and Fabrication of VLSI Circuits

VLSI III: Test und Fabrikation von hochintegrierten Schaltungen

VVZ CR n/a

Last Updated: 2026-02-05 15:19:51

Abstract

Know how to apply methods, software tools and equipment for designing testable VLSI circuits, for testing fabricated ICs, and for physical analysis in the occurrence of defective parts. A basic understanding of modern semiconductor technologies. Being familiar with decision criteria of economic nature and with models of industrial cooperation.

Objective

Know how to apply methods, software tools and equipment for designing testable VLSI circuits, for testing fabricated ICs, and for physical analysis in the occurrence of defective parts. A basic understanding of modern semiconductor technologies. Being familiar with decision criteria of economic nature and with models of industrial cooperation.

Content

This final course in a series of three focusses on manufacturing, testing, physical analysis, and packaging of VLSI circuits. Topics include: Effects of fabrication defects, abstraction from physical to transistor- and gate-level fault models, fault grading of large ASICs, generation of efficient test vector sets, enhancement of testability with built-in self test, organisation and application of automated test equipment, physical analysis of devices, packaging problems and solutions. The course further addresses: Models of industrial cooperation, the caveats of virtual components, the cost structures of ASIC development and manufacturing, market requirements, decision criteria, and case studies. Today's deep-submicron CMOS fabrication processes, outlook on the future evolution of semiconductor technology. Exercises teach students how to use CAE/CAD software and automated equipment for testing ASICs after fabrication. Students that have submitted a design for manufacturing at the end of the 7th term do so on their own circuits. Physical analysis methods with professional equipment (AFM, DLTS) complement this training.

Resources

Lecture Notes

yes, in English.

General Information

Language
German
Levels
DS , BSC , MSC
Frequency
Yearly recurring

Examination

Type
session examination
Mode
oral 30 minutes

Course Components

Type Title Time & Place Hours
lecture with exercise VLSI III: Test und Fabrikation von hochintegrierten Schaltungen
Übungen gemäss Einschreibeliste
  • Wed 13:15-15:00 (ETZ E 8)
4 h weekly

Offered In