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VLSI III: Test and Fabrication of VLSI Circuits
VLSI III: Test und Fabrikation von hochintegrierten Schaltungen
Last Updated: 2026-02-05 15:10:10
Abstract
Know how to apply methods, software tools and equipment for designing testable VLSI circuits, for testing fabricated ICs, and for physical analysis in the occurrence of defective parts. A basic understanding of modern semiconductor technologies.
Objective
Know how to apply methods, software tools and equipment for designing testable VLSI circuits, for testing fabricated ICs, and for physical analysis in the occurrence of defective parts. A basic understanding of modern semiconductor technologies.
Content
This course in a series of three focusses on manufacturing, testing, physical analysis, and packaging of VLSI circuits. Topics include: Effects of fabrication defects, abstraction from physical to transistor- and gate-level fault models, fault grading of large ASICs, generation of efficient test vector sets, enhancement of testability with built-in self test, organisation and application of automated test equipment, deep-submicron CMOS fabrication processes, physical analysis of devices, oackaging problems and solutions, technology outlook. Exercises teach students how to use CAE/CAD software and automated equipment for testing ASICs after fabrication. Students that have submitted a design for manufacturing at the end of the 7th term do so on their own circuits. Physical analysis methods with professional equipment (AFM, DLTS) complement this training.
Resources
Lecture Notes
yes, in English.
General Information
- Language
- German
- Frequency
- Yearly recurring
Examination
- Type
- session examination
- Mode
- oral 30 minutes
Course Components
| Type | Title | Time & Place | Hours |
|---|---|---|---|
| lecture with exercise |
VLSI III: Test und Fabrikation von hochintegrierten Schaltungen
Übungen gemäss Einschreibeliste
|
|
4 h weekly |