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252-0100-00L 6 Credits

Computer Architecture

Digitaltechnik und Rechnerstruktur

Lecturers & Examiners: Prof. em. Dr. Lothar Thiele
VVZ CR n/a

Last Updated: 2026-02-05 15:02:41

Abstract

The course provides indepth knowledge about the organization of modern computer architectures. It covers processor architectures (data path, control path, pipelining, microprogramming), memory hierarchy (cache, main memory, secondary memory, virtual memory), I/O (interfaces, communication infrastructure, analytic models), multiprocessor systems (coherence, protocols, synchronization, networks).

Objective

Understanding the organization of digital systems and computer architectures

Content

Processor architectures (data path, control path, pipelining, microprogramming), memory hierarchy (cache, main memory, secondary memory, virtual memory), I/O (interfaces, communication infrastructure, analytic models), multiprocessor systems (coherence, protocols, synchronization, networks).

Resources

Lecture Notes

Copies of the slides

Literature

D.A. Patterson, J.L. Hennessy: Computer Architecture, A quantitative approach. Morgan Kaufmann Publ, 2002. D.A. Patterson, J.L. Hennessy: Computer Organization and Design, Hardware/Software Interfach. Morgan Kaufmann Publ, 2005.

General Information

Language
German
Frequency
Yearly recurring

Examination

Type
session examination
Mode
written 180 minutes
Aids
Beliebige erlaubt

Course Components

Type Title Time & Place Hours
lecture Digitaltechnik und Rechnerstruktur
  • Wed 10:15-12:00 (IFW A 36)
  • Fri 13:15-14:00 (IFW A 36)
3 h weekly
exercise Digitaltechnik und Rechnerstruktur
(dazu 1 Std. Übungen ohne Präsenz)
  • Wed 08:15-10:00 (IFW A 34)
  • Wed 08:15-10:00 (IFW A 36)
  • Wed 08:15-10:00 (IFW C 42)
  • Thu 13:15-15:00 (IFW A 32.1)
  • Fri 10:15-12:00 (HG E 5)
  • Fri 10:15-12:00 (RZ F 21)
2 h weekly

Offered In