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227-1032-00L

Neuromorphic Engineering II

Information für UZH Studierende: Die Lerneinheit kann nur an der ETH belegt werden. Die Belegung des Moduls INI405 ist an der UZH nicht möglich. Beachten Sie die Einschreibungstermine an der ETH für UZH Studierende: Registration in this class requires the permission of the instructors. Class size will be limited to available lab spots. Preference is given to students that require this class as part of their major.
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Last Updated: 2026-07-21 00:35:15

Abstract

This course teaches the basics of analog chip design and layout with an emphasis on neuromorphic circuits, which are introduced in the fall semester course "Neuromorphic Engineering I".

Objective

Design of a neuromorphic circuit for implementation with CMOS technology.

Content

This course teaches the basics of analog chip design and layout with an emphasis on neuromorphic circuits, which are introduced in the autumn semester course "Neuromorphic Engineering I". The principles of CMOS processing technology are presented. Using a set of inexpensive software tools for simulation, layout and verification, suitable for neuromorphic circuits, participants learn to simulate circuits on the transistor level and to make their layouts on the mask level. Important issues in the layout of neuromorphic circuits will be explained and illustrated with examples. In the latter part of the semester students simulate and layout a neuromorphic chip. Schematics of basic building blocks will be provided. The layout will then be fabricated and will be tested by students during the following fall semester.

Resources

Literature

S.-C. Liu et al.: Analog VLSI Circuits and Principles; software documentation.

General Information