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227-0147-00L 6 Credits BSC , MSC D-ITET , D-PHYS , D-INFK

VLSI 2: From Netlist to Complete System on Chip

Lecturers & Examiners: Frank Kagan Gürkaynak, Prof. Dr. Luca Benini
Enrolment to the course is conditional on a short motivational description on why the student wants to visit the course by sending an e-mail to . A maximum of 77 students will be admitted to the course at the discretion of the lecturers based on the motivational e-mail. Students will not be admitted to the course without a motivational e-mail
VVZ CR n/a

Last Updated: 2026-06-03 00:14:20

Abstract

This second course in our VLSI series is concerned with how to turn digital circuit netlists into safe, testable and manufacturable mask layout, taking into account various parasitic effects. Starting in 2025, the course will rely on pre-dominantly open-source tools and put more emphasis on hands-on design. All students will be expected to complete their own design (in groups of two).

Objective

- Understand how VLSI circuits are designed - Gain practical experience in IC Design using open source tools - Qualify to take part in semester/master theses that involve practical IC Design - Develop your own System-on-Chip based on the examples in exercises

Content

The course begins with an overview refresher on front-end design (HDL, Synthesis) and then covers - Basic manufacturing steps - Standard cells, routing layers - Floorplanning, I/O ring, packaging - Timing in IC design and clock dsirtribution - Parasitic effects in IC Design - Placement and routing - Power analysis - Testing of IC circuits - Assessing the performance of ICs. The most important part of the lecture is that the exercises, which will make use of open-source tools (as much as possible) and work on a System-On-Chip design. The exercises are essential for the lecture as the grading will be done based on a project based on the exercises.

Resources

Lecture Notes

Course www site:http://vlsi.ethz.chH. Kaeslin: "Top-Down Digital VLSI Design, from Gate-Level Circuits to CMOS Fabrication", Lecture Notes Vol.2 , 2015.All written documents in English.

Literature

H. Kaeslin: "Top-Down Digital VLSI Design, from Architectures to Gate-Level Circuits and FPGAs", Elsevier, 2014, ISBN 9780128007303.

Learning Materials (Links)

General Information

Language
English
Levels
BSC , MSC
Frequency
Yearly recurring

Examination

Type
graded semester performance
Students will be asked to complete their own System-On-Chip design with an improvement based on the example design used in exercises, and they will be graded on the quality/timeliness of the design.As the final project is based on the exercises, we strongly suggest that students visit all exercises.The students will work in groups of 1 or 2 people, they will take the exercise design, and will be given a larger area to make one addition/improvement in the design. Submissions will be made electronically, grade will depend on timeliness (respecting the submission deadlines), functionality, performance and originality.Up to 5 best designs will be actually fabricated.

Registration & Places

Limited places (Special selection)
Signup End
27.02.2026

Course Components

Type Title Time & Place Hours
lecture with exercise VLSI 2: From Netlist to Complete System on Chip
Lecture: Tuesday, 14:00 - 16:00 Exercises: Wednesday, 09:00 - 12:00
  • Tue 14:15-16:00 (LFW B 1)
  • Wed 09:15-12:00 (ETZ D 61.1)
  • Wed 09:15-12:00 (ETZ D 61.2)
5 h weekly

Offered In

  • Computer Science Bachelor
  • Electrical Engineering and Information Technology Bachelor
    • Electives (This is only a short selection. Other courses from the ETH course catalogue may be chosen. Please consult the "Richtlinien zu Projekten, Praktika, Seminare" (German only), .)
  • Electrical Engineering and Information Technology Master
    • 01 - Courses of specializations
      • Track: Electronics and Photonics (The core courses and specialization courses below are a selection for students who wish to specialize in the area of "Electronics and Photonics", see . The individual study plan is subject to the tutor's approval.)
        • Core Courses (These core courses are particularly recommended for the field of "Electronics and Photonics". You may choose core courses form other fields in agreement with your tutor. A minimum of 24 credits must be obtained from core courses during the MSc EEIT.)
      • Track: Signal Processing and Machine Learning (The core courses and specialization courses below are a selection for students who wish to specialize in the area of "Signal Processing and Machine Learning ", see . The individual study plan is subject to the tutor's approval.)
        • Specialization Courses (These specialization courses are particularly recommended for the area of "Signal Processing and Machine Learning", but you are free to choose courses from any other field in agreement with your tutor. Semester / Research Projects are not allowed in this category. A minimum of 40 credits must be obtained from specialization courses during the MSc EEIT.)
      • Tracks (all): Electives (Courses from the ETH course catalogue may be chosen in agreement with your tutor. As an alternative to the elective courses, students may do a second semester project or an internship in industry. Please consult your tutor.)
  • Physics Master
    • Electives
      • General Electives (Students may choose General Electives from the entire course programme of ETH Zurich - with the following restrictions: courses that belong to the first or second year of a Bachelor curriculum at ETH Zurich as well as courses from GESS "Science in Perspective" are not eligible here. The following courses are explicitly recommended to physics students by their lecturers. (Courses in this list may be assigned to the category "General Electives" directly in myStudies. For the category assignment of other eligible courses keep the choice "no category" and take contact with the Study Administration ( ) after having received the credits.))
  • Neural Systems and Computation Master
  • Quantum Engineering Master
    • Electives (This is a selection of courses particularly suitable for the MSc QE. In agreement with the tutor, students may choose other courses from the ETH course catalogue.)