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227-0147-10L 6 Credits BSC , MSC D-ITET , D-PHYS , D-MATH
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VLSI 3: Full-Custom Digital Circuit Design

Lecturers & Examiners: Dr. Oscar Castañeda Fernández, Prof. Dr. Christoph Studer
VVZ CR n/a

Last Updated: 2026-06-01 11:31:03

Abstract

This third course in our VLSI series is concerned with full-custom digital integrated circuits. The goals include learning the design of digital circuits on the schematic, layout, gate, and register-transfer levels. The use of state-of-the-art CAD software (Cadence Virtuoso) in order to simulate, optimize, and characterize digital circuits is another important topic of this course.

Objective

At the end of this course, you will • understand the design of the main building blocks of state-of-the-art digital integrated circuits • be able to design and optimize digital integrated circuits on the schematic, layout, and gate levels • be able to use standard industry software (Cadence Virtuoso) for drawing, simulating, and characterizing digital circuits • understand the performance trade-offs between delay, area, and power consumption

Content

The third VLSI course begins with the basics of metal-oxide-semiconductor (MOS) field-effect transistors (FETs) and moves up the stack towards logic gates and increasingly complex digital circuit structures. The topics of this course include: • Nanometer MOSFETs • Static and dynamic behavior of complementary MOS (CMOS) inverters • CMOS gate design, sizing, and timing • Full-custom standard-cell design • Wire models and parasitics • Latch and flip-flop circuits • Gate-level timing analysis and optimization • Static and dynamic power consumption; low-power techniques • Alternative logic styles (dynamic logic, pass-transistor logic, etc.) • Arithmetic and logic circuits • Fixed-point and floating-point arithmetic • Synchronous and asynchronous design principles • Memory circuits (ROM, SRAM, and DRAM) • In- and near-memory processing architectures • Full-custom accelerator circuits for machine learning The exercises are concerned with schematic entry, layout, and simulation of digital integrated circuits using a disciplined standard-cell-based approach with Cadence Virtuoso.

Resources

Literature

N. H. E. Weste and D. M Harris, CMOS VLSI Design: A Circuits and Systems Perspective (4th Ed.), Addison-Wesley

Learning Materials (Links)

General Information

Language
English
Levels
BSC , MSC
Frequency
Yearly recurring

Examination

Type
session examination
Mode
written 150 minutes
Aids
An exam summary of up to 3 A4-sized papers (or max. 6 pages) is permitted. Calculators without communication abilities are allowed; otherwise, no electronic help is permitted.
The exercises are an essential part of this course. If at least 6 out of the 11 exercises are successfully submitted in time, then the final grade will be the grade of the exam plus 0.25 (but not exceed 6.0).

Course Components

Type Title Time & Place Hours
lecture VLSI 3: Full-Custom Digital Circuit Design
  • Mon 10:15-12:00 (ETZ E 8)
2 h weekly
exercise VLSI 3: Full-Custom Digital Circuit Design
  • Thu 13:15-16:00 (ETZ D 61.1)
  • Thu 13:15-16:00 (ETZ D 61.2)
  • Thu 13:15-16:00 (ETZ H 91)
3 h weekly

Offered In

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  • Elektrotechnik und Informationstechnologie Master
    • 01 - Fächer der Vertiefungen
      • Vertiefung: Electronics and Photonics (The core courses and specialisation courses below are a selection for students who wish to specialise in the area of "Electronics and Photonics", see . The individual study plan is subject to the tutor's approval.)
        • Kernfächer (These core courses are particularly recommended for the field of "Electronics and Photonics". You may choose core courses form other fields in agreement with your tutor. A minimum of 24 credits must be obtained from core courses during the MSc EEIT.)
      • Vertiefung: Communication (The core courses and specialisation courses below are a selection for students who wish to specialise in the area of "Communication", see . The individual study plan is subject to the tutor's approval.)
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  • Physik Master
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