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Projects & Seminars: Memory Design: From Architecture Down to Basic Cells
Projekte & Seminare: Speicherentwurf: von der Architektur bis zur Grundspeicherzelle
Last Updated: 2026-02-05 15:47:12
Abstract
The category of "Laboratory Courses, Projects, Seminars" includes courses and laboratories in various formats designed to impart practical knowledge and skills. Moreover, these classes encourage independent experimentation and design, allow for explorative learning and teach the methodology of project work.
Objective
What is the cache memory and how much of it does a PC need? What is the difference between DRAM and SRAM? What are bit lines, word lines, column decoders and sense amplifiers? What does precharging mean and where is it used? How does a memory cell look on silicon and how is it manufactured? You will learn these and many other things in this P&S. Memories are important components in all modern electronic devices (e.g: computer, smartphone, TV, ...). Depending on the area of application, an engineer can look at the storage system from different perspectives. This P&S gives an overview of these different perspectives and explains the relationships between them. Since these different perspectives are not only available for memory but for all integrated circuits in general, this P&S will help you to classify further specialized knowledge in a broader context. During the exercise part of the seminar, you will work with various simulation programs. These include sophisticated programs used by engineers in research and development. So you are going to practice on professional software, and during the simulations (exercise part) and group work / lectures (seminar part) you are going to develop basic knowledge that you can later deepen during the specialized lectures. According to the different perspectives, the P&S "Basic Memory Design" consists of three parts of roughly the same length: - System Design: In this part you are going to learn the various current storage types from the system developer point of view. What can you achieve? How are they built into circuits in order to obtain a storage system that offers the right size and speed with acceptable energy consumption? Since there are many different types of storage, the participants will study data sheets individually and will discuss them with the P&S assistants as part of a lecture (seminar part). With a simple cache simulator you will examine the influence of the design parameters in a memory hierarchy. - Circuit Design: In this part you are going to learn the memory as an electronic circuit. How the transistors have to be interconnected in order to be able to write, save and read out data? How should these transistors be dimensioned in order to achieve the desired speed or energy efficiency? With simulations you will experience how the engineer examines and optimizes such circuits. - Physical Design: This part goes even deeper. Millions of transistors on a small silicon wafer form a modern memory chip. How are the memory cells produced on the chip? What does a memory cell look like? How is the memory cell optimized? With the help of modern simulation tools, you will get to know the design practices that are used during development today. You will also learn about the methods and technologies used to manufacture modern integrated circuits.
General Information
- Language
- German
- Levels
- BSC
- Frequency
- Semesterly recurring
Examination
- Type
- ungraded semester performance
Registration & Places
- Signup Start
- 17.09.2021
- Signup End
- 01.10.2021
Course Components
| Type | Title | Time & Place | Hours |
|---|---|---|---|
| practical/laboratory course |
Projekte & Seminare: Speicherentwurf: von der Architektur bis zur Grundspeicherzelle
Does not take place this semester.
Für den Zugang zum Angebot und zur Einschreibung loggen Sie sich hier ein (mit Ihrem n.ETHZ account):
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To access the offer and to enroll for courses log in (with your n.ethz account):
Please note that the P&S-site is accessible no earlier than two weeks before the start of the semester until four weeks after the start of the semester. Enrollment is only possible from Friday before the start of the semester until noon of the first Friday in the semester.
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No time listed | 3 h weekly |
Offered In
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Laboratory Courses, Projects, Seminars (A minimum of 15 cp (under the 2018 regulations), respectively at least 18 cp (under the 2016 regulations) must be achieved in the category "Laboratory Courses, Projects, Seminars".)
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Projects & Seminars (Enrolment is only possible for students in the BSc Electrical Engineering and Information Technology from Friday before the start of the semester. Places are allocated using the P&S application tool ( ). Please only enrol for P&S for which you apply via the tool.)
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