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Projects & Seminars: Understanding and Designing Modern Solid-State Drives (SSDs)
Projekte & Seminare: Understanding and Designing Modern Solid-State Drives (SSDs)
Last Updated: 2026-02-05 15:53:33
Abstract
The category of "Laboratory Courses, Projects, Seminars" includes courses and laboratories in various formats designed to impart practical knowledge and skills. Moreover, these classes encourage independent experimentation and design, allow for explorative learning and teach the methodology of project work.
Objective
NAND flash memory is the de facto standard in architecting a storage device in modern computing systems. As modern computing systems process a large amount of data at an unprecedented scale, a storage device needs to meet high requirements on storage capacity and I/O performance. A NAND flash-based SSD can provide an order(s) of magnitude higher I/O performance compared to traditional hard-disk drives (HDDs), with a much lower cost-per-bit value over any other SSDs based on emerging non-volatile memory (NVM) technologies. NAND flash memory has several unique characteristics, such as the erase-before write property (i.e., a flash cell needs to be first erased before programming it), limited lifetime (i.e., a cell can reliably store data for a certain number of program/erase cycles), and large operation units (e.g., a NAND flash chip reads/writes data in a page (e.g., 16 KiB) granularity). To achieve high performance and large capacity of the storage system while hiding the unique characteristics of NAND flash memory, it is critical to design efficient SSD firmware, commonly called Flash-Translation Layer (FTL). An FTL is responsible for many critical management tasks, such as address translation, garbage collection, wear-leveling, and I/O scheduling, that significantly affect the performance, reliability, and lifetime of the SSD. In this P&S, we will cover how a modern NAND flash-based SSD is organized and operates, from the basics of underlying NAND flash devices and various SSD-management tasks at the FTL-level. You will build a practical SSD simulator by refactoring MQSim, a state-of-the-art simulator for high-end SSDs, to support advanced features of modern NAND flash chips and essential SSD-management tasks. This will allow you to have the chance to obtain a comprehensive background of modern storage systems and research experience on system optimization with rigorous evaluation. Prerequisites of the course: • No prior knowledge in NAND flash-based storage systems is required. • Digital Design and Computer Architecture (or equivalent course) • Good knowledge in C/C++ programming language is required. • Interest in system optimizations The course is conducted in English.
General Information
- Language
- English
- Levels
- BSC
- Frequency
- Semesterly recurring
Examination
- Type
- ungraded semester performance
Registration & Places
- Signup Start
- 19.02.2021
- Signup End
- 05.03.2021
Course Components
| Type | Title | Time & Place | Hours |
|---|---|---|---|
| practical/laboratory course |
Projekte & Seminare: Understanding and Designing Modern Solid-State Drives (SSDs)
Für den Zugang zum Angebot und zur Einschreibung loggen Sie sich hier ein (mit Ihrem n.ETHZ account):
Bitte beachten Sie, dass die Seite jeweils erst zwei Wochen vor Semesterbeginn zugänglich ist und im Verlauf des Semesters wieder abgeschaltet wird. Die Einschreibung ist nur von Freitag vor Semesterbeginn bis zum ersten Freitagmittag im Semester möglich.
To access the offer and to enroll for courses log in (with your n.ethz account):
Please note that the P&S-site is accessible no earlier than two weeks before the start of the semester until four weeks after the start of the semester. Enrollment is only possible from Friday before the start of the semester until noon of the first Friday in the semester.
Time: To be arranged with each student taking the course
Room: tba
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No time listed | 3 h weekly |
Offered In
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Laboratory Courses, Projects, Seminars (A minimum of 18 cp must be obtained from the category "Laboratory Courses, Projects, Seminars".)
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Projects & Seminars (A maximum of 13 cp can be obtained from Projects & Seminars. Each course can be registered for only once. Enrolment is only possible for students in the BSc Electrical Engineering and Information Technology from Friday before the start of the semester. Places are allocated using the P&S application tool ( ). Please only enrol for P&S for which you apply via the tool.)
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