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263-3840-00L 2 Credits DR , MSC , WBZ D-ITET , D-INFK , D-MATH

Hardware Architectures for Machine Learning

Lecturers & Examiners: Prof. Dr. Gustavo Alonso, Prof. Dr. Torsten Hoefler, Dr. Ce Zhang

The deadline for deregistering expires at the end of the second week of the semester. Students who are still registered after that date, but do not attend the seminar, will officially fail the seminar.

VVZ CR n/a

Last Updated: 2026-02-05 15:41:59

Abstract

The seminar covers recent results in the increasingly important field of hardware acceleration for data science and machine learning, both in dedicated machines or in data centers.

Objective

The seminar aims at students interested in the system aspects of machine learning, who are willing to bridge the gap across traditional disciplines: machine learning, databases, systems, and computer architecture.

Content

The seminar is intended to cover recent results in the increasingly important field of hardware acceleration for data science and machine learning, both in dedicated machines or in data centers.

Resources

Learning Materials (Links)

Main link
Information

General Information

Language: English
Levels: DR , MSC , WBZ
Frequency: Yearly recurring

Examination

Type: graded semester performance

Course Components

Type	Title	Time & Place	Hours
seminar	Hardware Architectures for Machine Learning	Thu 15:15-17:00 (LEE C 104)	2 h weekly